Recent advances in FPGAs, multi-core processors, and memory technologies have enabled high-performance platforms for accelerating complex applications. This talk reviews three decades of progress in reconfigurable computing and highlights current FPGA-based accelerators for data science. We present algorithm-architecture co-design techniques for developing efficient IP cores and end-to-end acceleration, with examples in graph analytics, machine learning, and privacy-preserving computations. Finally, we discuss opportunities and challenges in emerging heterogeneous systems combining CPUs, FPGAs, GPUs, and coherent memory.
Enhanced Security with Quantum-Secure Authenticated Boot, Xiphera
AgilexTM 5-based demo featuring Xiphera’s nQrux® Secure Boot IP core, the Quantum-Secure Authenticated Boot secures systems against both contemporary and emerging cryptographic threats.
Ultra-Low-Latency Edge AI, Flapmax
Agilex™ 5 FPGA-powered, reconfigurable AI inference platform for real-time Intelligence, Surveillance and Reconnaissance at the tactical edge with Flapmax SKY-0.
Wireband Direct-RF Agilex™ 9 Performance for 3U-VPX System, Mistral
AgilexTM 9 Quad-channel Direct RF ADC/DAC performance over an ultra-wide bandwidth of 0.1–18 GHz, with high-speed data throughput via 40G Ethernet and PCIe Gen4 interfaces.
This session is part of our “Innovators Day Webinar Series”. Registration/event page here.
Charles Lee Powell Chair in Engineering in the Ming Hsieh Department of Electrical and Computer Engineering and Professor of Computer Science at the University of Southern California
Viktor K. Prasanna (sites.usc.edu/prasanna) is Charles Lee Powell Chair in Engineering in the Ming Hsieh Department of Electrical and Computer Engineering and Professor of Computer Science at the University of Southern California. He is the...