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Every Industry and vertical is using, considering, or scaling FPGAs in their compute strategy already. It's time to dig into the engineering and mechanics of how companies are leveraging FPGA and how they'll be used moving forward. In this series of roundtable discussions, Embedded Computing Design will bring together the leading voices in embedded engineering and business to discuss, debate, and delineate all the details for you. We will dig into FPGA's proven power for AI Acceleration, how FPGAs are optimizing and enabling Datacenter and Server efficiency and power, the ways Automotive is leading the way in FPGA, and how FPGAs can drive sustainable computing solutions. Don't miss them, register now.
Wed, Jun. 17, 2026 · 11:00 am (PDT)
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FPGAs can provide servers and datacenters with peak efficiency and optimization, outperforming CPUs and GPUs acceleration offload, network-traffic management, and storage allocation. In this panel, experts will talk about how FPGA can leverage configurable logic cell arrays, numerous power rails, and secure memory and boot functions for better and more powerful datacenters.
AVP, Segment Marketing, Lattice Semiconductor​​
Mamta Gupta is AVP of Segment Marketing at Lattice Semiconductor, where she leads strategic business development for the datacenter, telecommunications, and security segments. With more than 20 years of experience in FPGA product development, she specializes in secure, high‑reliability solutions and leads Lattice’s post‑quantum cryptography (PQC) and baseboard management controller (BMC) strategy. She holds a BS and MS in Physics from St. Stephen’s College, University of Delhi, completed advanced program management at Stanford University, and has professional training in IC engineering from the University of California, Berkeley. She is also a recipient of the Women of Quantum Award.
Editor in Chief Embedded Computing Design
Tue, Jul. 07, 2026 · 8:00 am (PDT)
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As critical infrastructure, AI systems, industrial automation, defense networks, and next-generation communications demand higher bandwidth and lower latency, traditional software-based security architectures are increasingly becoming bottlenecks. The need for deterministic performance, real-time encryption, and resilient communications at 100Gbps is driving a new wave of hardware-accelerated secure networking platforms built on FPGAs.
Co-founder and CEO of Pantherun
Srinivas, CEO of Pantherun, brings a wealth of experience in cybersecurity, embedded product design, and high-throughput communication, with a career spanning over two decades in the semiconductor and tech industries. A computer science graduate, he began as an ASIC design engineer in the United States, gaining deep technical expertise that fueled his focus on creating secure, high-performance solutions.

Srinivas has successfully built and led two organizations dedicated to networking, consumer, and automotive sectors, holding leadership roles, including CEO, in companies that grew to over 600 employees and served clients in more than 40 countries. His expertise in designing secure, high-speed communication systems and embedded products has made him a recognized leader in industrial networking and cybersecurity.

In 2019, Srinivas co-founded Pantherun with a mission to advance encrypted data communication for edge computing, reinforcing his commitment to cybersecurity innovation. His leadership at Pantherun continues his track record of delivering secure, cutting-edge solutions for mission-critical applications in a constantly evolving digital landscape.
Country Manager for Embedded Group at AMD
Rohith Gopalakrishna is a seasoned Semiconductor professional with more than 18 years of experience. He is currently the Country Manager for Embedded Group at AMD India, Largest Fabless Semiconductor company in the World. In his current role he is responsible for all of AMD’s Embedded Business in India which includes CPU, GPU, FPGAs and SoC across diverse vertical markets like Aerospace & Defense, Industrial, Automotive, 5G, Datacenter etc. He is also responsible for Partnership program, Start-up Incubation & University Programs at AMD India. Rohith joined Xilinx (now part of AMD) in 2015 & is an active member of IESA (Indian Electronics & Semiconductor Association) and is closely involved in several Govt. initiatives like Swadeshi Microprocessor Challenge, SMDP and TSDSI India 5G Initiative etc. Prior to this role, he worked at Texas Instruments US, India from 2007-2015 in several roles in Application Engineering & Business management. Rohith received an Executive Management Degree from IIM Kozhikode and a bachelor’s degree in Electronics and Communication Engineering from PESIT, Bangalore. Rohith is an avid Volleyball player, Long distance cyclist and Classical Carnatic musician.
Thu, Apr. 02, 2026 · 11:00 am (PDT)
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Because of their flexibility and programmability, FPGAs offer unique opportunities for AI acceleration. Thanks to a reconfigurable fabric for data processing, they can be deployed at the edge or in datacenters and servers. In this discussion, the panel will talk about how to design for FPGA with AI acceleration in mind, and what is required for success.
Director of Segment Marketing, Lattice Semiconductor
Hussein Osman is a semiconductor industry veteran, with 20+ years’ experience bringing multiple new technologies to market. Over the past 5 years he has been leading the sensAI solution development and go to market at Lattice semiconductor. Hussein is interested in creating usable and high-performance AI applications with a personal focus on medical electronics. Mr. Osman received his bachelor’s degree in Electrical Engineering from California Polytechnic State University in San Luis Obispo.
AI Fellow, Lattice Semiconductor
Nicolas Widynski joined Lattice Semiconductor in 2021 following its acquisition of Mirametrix, where he had been a member of the founding team since 2014. At Lattice Semiconductor, Nicolas leverages his extensive expertise in computer vision and machine learning to lead the company’s AI initiatives. He previously held two postdoctoral research positions at the University of Montreal, focusing on computer vision (2011–2013) and medical computer vision (2013–2014). He earned his Ph.D. in computer vision from Telecom ParisTech in 2010, and an M.Sc. from Telecom ParisTech and the University Pierre et Marie Curie (Paris VI) in 2007.
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