WEBINAR DETAILS
  • When
  • About
    Chiplets aren't just for hyperscalers, but deploying them in embedded designs requires different solutions than in the datacenter. This session will address practical ways to partition across chiplets, what UCIe and die-to-die interconnect choices could mean for various architectures, how to manage power, thermal, and testing across multiple dies, and how to manage cost on the spectrum between monolithic SoC and chiplets at embedded volumes. Whether you're evaluating chiplet-based processors or considering a custom multi-die design, this session covers the engineering decisions that determine whether chiplets make sense for your next systems.

    This session is part of our “Chiplet Virtual Conference". Registration/event page here.
  • Duration
    1 hour
  • Price
    Free
  • Language
    English
  • OPEN TO
    Everyone
  • Dial-in available
    (listen only)
    Not available.
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