Smarter AI Starts with Agilex™ FPGAs & SoCs—Delivering FPGAi Through the Latest Silicon and Software

This session dives into three core pillars of Altera’s FPGA innovation: performance, AI acceleration, and security. We’ll examine the Agilex™ 7 family’s architectural enhancements that deliver up to 2× performance gains over prior generations, achieving median frequencies above 650 MHz on internal benchmarks while reducing power and cost through optimized resource utilization. Next, we explore advanced AI and security capabilities. Learn how the AI Tensor Block achieves 10× higher floating-point compute density within FPGA fabric through innovations in routing, precision formats, and weight preloading—enabling Agilex devices to outperform leading embedded GPUs in low-batch inference workloads. Finally, we detail Altera’s security roadmap, including updatable architectures, black key provisioning, and post-quantum cryptography in Agilex 5 and Agilex 3, ensuring robust protection for edge, embedded, and data center deployments.

AI-Powered AES & L2/L3 Stack on Open-Source FPGA Board, Pantherun

• Real-time AES & L2/L3 at 1 Gbps, zero latency, no key exchange — powered by Decision Tree AI on Pepper, Altera Partner Pantherun’s fully open-source Agilex 5 FPGA-based platform.

Programmable Hardware Platform for AI & Storage Acceleration, Napatech

• Altera partner Napatech’s AgilexTM FPGA-powered platform accelerates AI and storage with composable RTL in DPU or SmartNIC modes, delivering ultra-low latency and high bandwidth.

400G FPGA-based NIC for Scalable AI Networking, Silicom

• Scalable 400G AI networking with smart real-time traffic flow control using Altera partner Silicom’s AgilexTM 7 M-Series-based ThunderFjord card and DYNANIC’s FPGA pipeline IP/solution.

This session is part of our “Innovators Day Webinar Series”. Registration/event page here.

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