Every Millisecond Between Photon and Pixel Changes What We Can Build

This session dives into building ultra-low-latency, deterministic vision pipelines for edge applications using FPGA-based architectures. It explores technical bottlenecks such as latency, bandwidth, and determinism, and provides practical design strategies—like leveraging streaming architectures, minimizing external memory use, and preferring fixed-point over floating-point for efficiency. Developers will learn how to optimize image-processing tasks and implement hot-swappable filters and neural networks without full bitstream rebuilds. The talk also introduces Agilex™ 3 FPGAs and Quartus® Prime tools, highlighting their DSP capabilities, security features, and performance benefits for vision workloads. Real-world use cases include ADAS, robotics, inline inspection, and AR/VR, where sub-frame latency and deterministic behavior are critical. Finally, Adam walks through how Visual Designer Studio accelerates IP customization and parameterization for rapid prototyping.

AI-Powered PPE Compliance Monitoring, Logic Fruit

• Real-time detection of PPE compliance, using an Agilex™ 5 FPGA-based board, accelerating YOLOv8-based object detection for PPE classification and safety-triggered I/O control.

Integrated Photo Viewer with Agilex™ 3 & Nios® V, Terasic

• A complete embedded system on Terasic’s Atum A3 Nano that uses the Altera Nios® V soft processor to drive, manage, and display images on an SD card.

DisplayPort to USB 20Gbps Video Conversion, SLS

• The demo showcases the real-time processing of large data streams and high-speed data transfer enabled by SLS’s USB 20Gbps Device IP Core and Agilex™ high-speed transceivers.

This session is part of our “Innovators Day Webinar Series”. Registration/event page here.

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